Germany – Computer-aided design (CAD) software package – Verification IP (IMS-09) - PR903426-2380-P

Tooling and IP Blocks for verification of safety and security features of digital designs, RISC-V microcontrollers and extensions and platform features of System on Chips. To check and guarantee fail safe operation as well as fault detection and correction, classical HDL verification IP as well as formal verification will be used. The support for the RISC-V architecture must be ensured. At the end of the project, the IP provider is requested to make the tooling and rule set definitions available under Open Source license.